/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef _BOARD_CONFIG_H_
#define _BOARD_CONFIG_H_

#ifdef __cplusplus
 extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"

typedef enum
{
  BUTTON_KEY = 0,
} Button_TypeDef;

typedef enum
{
  BUTTON_MODE_GPIO = 0,
  BUTTON_MODE_EXTI = 1
} ButtonMode_TypeDef;

#define LEDn	0
#define BUTTONn	0

#define BOARD_SPIn	1
/*##################### board SPI1 ###################################*/
#define BOARD_SPI1				SPI4
#define BOARD_SPI1_CLK_ENABLE()			__SPI4_CLK_ENABLE()
#define BOARD_SPI1_AF				GPIO_AF5_SPI4

#define BOARD_SPI1_FORCE_RESET()               __HAL_RCC_SPI4_FORCE_RESET()
#define BOARD_SPI1_RELEASE_RESET()             __HAL_RCC_SPI4_RELEASE_RESET()

#define BOARD_SPI1_SCK_PIN			GPIO_PIN_2
#define BOARD_SPI1_SCK_GPIO_PORT		GPIOE
#define BOARD_SPI1_SCK_GPIO_CLK_ENABLE()	__GPIOE_CLK_ENABLE()

#define BOARD_SPI1_MISO_PIN			GPIO_PIN_5
#define BOARD_SPI1_MISO_GPIO_PORT		GPIOE
#define BOARD_SPI1_MISO_GPIO_CLK_ENABLE()	__GPIOE_CLK_ENABLE()

#define BOARD_SPI1_MOSI_PIN			GPIO_PIN_6
#define BOARD_SPI1_MOSI_GPIO_PORT		GPIOE
#define BOARD_SPI1_MOSI_GPIO_CLK_ENABLE()	__GPIOE_CLK_ENABLE()

/*####################### BOARD SPI DMA #############################*/
#define BOARD_SPI1_DMA_CLK_ENABLE()             __HAL_RCC_DMA2_CLK_ENABLE()
#define BOARD_SPI1_TX_DMA_CHANNEL		DMA_CHANNEL_5
#define BOARD_SPI1_TX_DMA_STREAM		DMA2_Stream4
#define BOARD_SPI1_RX_DMA_CHANNEL		DMA_CHANNEL_5
#define BOARD_SPI1_RX_DMA_STREAM		DMA2_Stream3

#define BOARD_SPI1_DMA_TX_IRQn                 DMA2_Stream4_IRQn
#define BOARD_SPI1_DMA_RX_IRQn                 DMA2_Stream3_IRQn
#define BOARD_SPI1_DMA_TX_IRQHandler           DMA2_Stream4_IRQHandler
#define BOARD_SPI1_DMA_RX_IRQHandler           DMA2_Stream3_IRQHandler

/*####################### devices' cs pin ############################*/
#if BOARD_SPIn > 0
#define BOARD_SPI_DEVn	2
#define BOARD_SPI_DEV1_CS_PIN			GPIO_PIN_3
#define BOARD_SPI_DEV1_CS_GPIO_PORT		GPIOE
#define BOARD_SPI_DEV1_CS_GPIO_CLK_ENABLE()	__GPIOE_CLK_ENABLE()

#define BOARD_SPI_DEV2_CS_PIN			GPIO_PIN_4
#define BOARD_SPI_DEV2_CS_GPIO_PORT		GPIOE
#define BOARD_SPI_DEV2_CS_GPIO_CLK_ENABLE()	__GPIOE_CLK_ENABLE()

#define MPU9250_SPI		1
#define MPU9250_CS_PIN		1
#define MS5607_SPI		1
#define MS5607_CS_PIN		2
#endif

/* Maximum Timeout values for flags waiting loops. These timeouts are not based
   on accurate values, they just guarantee that the application will not remain
   stuck if the SPI communication is corrupted.
   You may modify these timeout values depending on CPU frequency and application
   conditions (interrupts routines ...). */   
#define SPIx_TIMEOUT_MAX                            0x1000 /*<! The value of the maximal timeout for BUS waiting loops */

/*##################### EVENT TRIGGER TIMER ####################*/
#define TRIGGER_TIMER		TIM7
#define TRIGGER_FREQ		1000
#define TRIGGER_TIMER_CLK_ENABLE()		__HAL_RCC_TIM7_CLK_ENABLE()
#define TRIGGER_TIMER_IRQn                      TIM7_IRQn
#define TRIGGER_TIMER_IRQHandler                TIM7_IRQHandler

#define BOARD_UARTn	2
/*###################### BOARD UART1 ##########################*/
#define BOARD_UART1                           UART4
#define BOARD_UART1_CLK_ENABLE()              __HAL_RCC_UART4_CLK_ENABLE();

#define BOARD_UART1_FORCE_RESET()             __HAL_RCC_UART4_FORCE_RESET()
#define BOARD_UART1_RELEASE_RESET()           __HAL_RCC_UART4_RELEASE_RESET()

/* Definition for USARTx Pins */
#define BOARD_UART1_TX_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOC_CLK_ENABLE()
#define BOARD_UART1_TX_PIN                    GPIO_PIN_10
#define BOARD_UART1_TX_GPIO_PORT              GPIOC
#define BOARD_UART1_TX_AF                     GPIO_AF8_UART4
#define BOARD_UART1_RX_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOC_CLK_ENABLE()
#define BOARD_UART1_RX_PIN                    GPIO_PIN_11
#define BOARD_UART1_RX_GPIO_PORT              GPIOC
#define BOARD_UART1_RX_AF                     GPIO_AF8_UART4

/*###################### BOARD UART1 DMA ######################*/
#define BOARD_UART1_DMA_CLK_ENABLE()          __HAL_RCC_DMA1_CLK_ENABLE()
/* Definition for USARTx's DMA */
#define BOARD_UART1_TX_DMA_CHANNEL            DMA_CHANNEL_4
#define BOARD_UART1_TX_DMA_STREAM             DMA1_Stream4
#define BOARD_UART1_RX_DMA_CHANNEL            DMA_CHANNEL_4
#define BOARD_UART1_RX_DMA_STREAM             DMA1_Stream2

/* Definition for USARTx's NVIC */
#define BOARD_UART1_DMA_TX_IRQn               DMA1_Stream4_IRQn
#define BOARD_UART1_DMA_RX_IRQn               DMA1_Stream2_IRQn
#define BOARD_UART1_DMA_TX_IRQHandler         DMA1_Stream4_IRQHandler
#define BOARD_UART1_DMA_RX_IRQHandler         DMA1_Stream2_IRQHandler
#define BOARD_UART1_IRQn                      UART4_IRQn
#define BOARD_UART1_IRQHandler                UART4_IRQHandler

/*###################### BOARD UART2 ##########################*/
#define BOARD_UART2                           USART1
#define BOARD_UART2_CLK_ENABLE()              __HAL_RCC_USART1_CLK_ENABLE();

#define BOARD_UART2_FORCE_RESET()             __HAL_RCC_USART1_FORCE_RESET()
#define BOARD_UART2_RELEASE_RESET()           __HAL_RCC_USART1_RELEASE_RESET()

/* Definition for USARTx Pins */
#define BOARD_UART2_TX_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOA_CLK_ENABLE()
#define BOARD_UART2_TX_PIN                    GPIO_PIN_9
#define BOARD_UART2_TX_GPIO_PORT              GPIOA
#define BOARD_UART2_TX_AF                     GPIO_AF7_USART1
#define BOARD_UART2_RX_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOA_CLK_ENABLE()
#define BOARD_UART2_RX_PIN                    GPIO_PIN_10
#define BOARD_UART2_RX_GPIO_PORT              GPIOA
#define BOARD_UART2_RX_AF                     GPIO_AF7_USART1

/*###################### BOARD UART2 DMA ######################*/
#define BOARD_UART2_DMA_CLK_ENABLE()          __HAL_RCC_DMA2_CLK_ENABLE()
/* Definition for USARTx's DMA */
#define BOARD_UART2_TX_DMA_CHANNEL            DMA_CHANNEL_4
#define BOARD_UART2_TX_DMA_STREAM             DMA2_Stream7
#define BOARD_UART2_RX_DMA_CHANNEL            DMA_CHANNEL_4
#define BOARD_UART2_RX_DMA_STREAM             DMA2_Stream5

/* Definition for USARTx's NVIC */
#define BOARD_UART2_DMA_TX_IRQn               DMA2_Stream7_IRQn
#define BOARD_UART2_DMA_RX_IRQn               DMA2_Stream5_IRQn
#define BOARD_UART2_DMA_TX_IRQHandler         DMA2_Stream7_IRQHandler
#define BOARD_UART2_DMA_RX_IRQHandler         DMA2_Stream5_IRQHandler
#define BOARD_UART2_IRQn                      USART1_IRQn
#define BOARD_UART2_IRQHandler                USART1_IRQHandler

#if BOARD_UARTn > 0
#define BOARD_STDIN_UART	1
#define BOARD_STDOUT_UART	1
#define BOARD_STDERR_UART	1

#define BOARD_DSM2_UART		2
#endif

/* ####################### EEPROM ############################### */
#define FLASH_AS_EEPROM
#ifdef FLASH_AS_EEPROM
/* Base address of the Flash sectors Bank 1 */
#define ADDR_FLASH_SECTOR_0     ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */
#define ADDR_FLASH_SECTOR_1     ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */
#define ADDR_FLASH_SECTOR_2     ((uint32_t)0x08008000) /* Base @ of Sector 2, 16 Kbytes */
#define ADDR_FLASH_SECTOR_3     ((uint32_t)0x0800C000) /* Base @ of Sector 3, 16 Kbytes */
#define ADDR_FLASH_SECTOR_4     ((uint32_t)0x08010000) /* Base @ of Sector 4, 64 Kbytes */
#define ADDR_FLASH_SECTOR_5     ((uint32_t)0x08020000) /* Base @ of Sector 5, 128 Kbytes */
#define ADDR_FLASH_SECTOR_6     ((uint32_t)0x08040000) /* Base @ of Sector 6, 128 Kbytes */
#define ADDR_FLASH_SECTOR_7     ((uint32_t)0x08060000) /* Base @ of Sector 7, 128 Kbytes */
#define ADDR_FLASH_SECTOR_8     ((uint32_t)0x08080000) /* Base @ of Sector 8, 128 Kbytes */
#define ADDR_FLASH_SECTOR_9     ((uint32_t)0x080A0000) /* Base @ of Sector 9, 128 Kbytes */
#define ADDR_FLASH_SECTOR_10    ((uint32_t)0x080C0000) /* Base @ of Sector 10, 128 Kbytes */
#define ADDR_FLASH_SECTOR_11    ((uint32_t)0x080E0000) /* Base @ of Sector 11, 128 Kbytes */

/* Base address of the Flash sectors Bank 2 */
#define ADDR_FLASH_SECTOR_12     ((uint32_t)0x08100000) /* Base @ of Sector 0, 16 Kbytes */
#define ADDR_FLASH_SECTOR_13     ((uint32_t)0x08104000) /* Base @ of Sector 1, 16 Kbytes */
#define ADDR_FLASH_SECTOR_14     ((uint32_t)0x08108000) /* Base @ of Sector 2, 16 Kbytes */
#define ADDR_FLASH_SECTOR_15     ((uint32_t)0x0810C000) /* Base @ of Sector 3, 16 Kbytes */
#define ADDR_FLASH_SECTOR_16     ((uint32_t)0x08110000) /* Base @ of Sector 4, 64 Kbytes */
#define ADDR_FLASH_SECTOR_17     ((uint32_t)0x08120000) /* Base @ of Sector 5, 128 Kbytes */
#define ADDR_FLASH_SECTOR_18     ((uint32_t)0x08140000) /* Base @ of Sector 6, 128 Kbytes */
#define ADDR_FLASH_SECTOR_19     ((uint32_t)0x08160000) /* Base @ of Sector 7, 128 Kbytes */
#define ADDR_FLASH_SECTOR_20     ((uint32_t)0x08180000) /* Base @ of Sector 8, 128 Kbytes  */
#define ADDR_FLASH_SECTOR_21     ((uint32_t)0x081A0000) /* Base @ of Sector 9, 128 Kbytes  */
#define ADDR_FLASH_SECTOR_22     ((uint32_t)0x081C0000) /* Base @ of Sector 10, 128 Kbytes */
#define ADDR_FLASH_SECTOR_23     ((uint32_t)0x081E0000) /* Base @ of Sector 11, 128 Kbytes */

#define EEPROM_PAGE_SIZE	(uint32_t)0x1000
#define EEPROM_SECTOR_SIZE	(uint32_t)0x4000

#define EEPROM_SECTOR0_BASE	ADDR_FLASH_SECTOR_14
#define EEPROM_SECTOR1_BASE	ADDR_FLASH_SECTOR_15

#define EEPROM_SECTOR0		FLASH_SECTOR_14
#define EEPROM_SECTOR1		FLASH_SECTOR_15

#define EEPROM_VOLTAGE_RANGE	VOLTAGE_RANGE_3
#endif

/*##################### I2C1 ###################################*/
/* I2C clock speed configuration (in Hz) */
#ifndef I2C_SPEED
 #define I2C_SPEED                            100000
#endif /* I2C_SPEED */

/* I2C peripheral configuration defines (control interface of the audio codec) */
#define DISCOVERY_I2Cx                            I2C1
#define DISCOVERY_I2Cx_CLK_ENABLE()               __I2C1_CLK_ENABLE()
#define DISCOVERY_I2Cx_SCL_SDA_GPIO_CLK_ENABLE()  __GPIOB_CLK_ENABLE()
#define DISCOVERY_I2Cx_SCL_SDA_AF                 GPIO_AF4_I2C1
#define DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT          GPIOB
#define DISCOVERY_I2Cx_SCL_PIN                    GPIO_PIN_6
#define DISCOVERY_I2Cx_SDA_PIN                    GPIO_PIN_9

#define DISCOVERY_I2Cx_FORCE_RESET()              __I2C1_FORCE_RESET()
#define DISCOVERY_I2Cx_RELEASE_RESET()            __I2C1_RELEASE_RESET()

/* I2C interrupt requests */
#define DISCOVERY_I2Cx_EV_IRQn                    I2C1_EV_IRQn
#define DISCOVERY_I2Cx_ER_IRQn                    I2C1_ER_IRQn

/* Maximum Timeout values for flags waiting loops. These timeouts are not based
   on accurate values, they just guarantee that the application will not remain
   stuck if the SPI communication is corrupted.
   You may modify these timeout values depending on CPU frequency and application
   conditions (interrupts routines ...). */
#define I2Cx_TIMEOUT_MAX    0x1000 /*<! The value of the maximal timeout for BUS waiting loops */


/*##################### ACCELEROMETER ##########################*/
/* Read/Write command */
#define READWRITE_CMD                     ((uint8_t)0x80) 
/* Multiple byte read/write command */ 
#define MULTIPLEBYTE_CMD                  ((uint8_t)0x40)
/* Dummy Byte Send by the SPI Master device in order to generate the Clock to the Slave device */
#define DUMMY_BYTE                        ((uint8_t)0x00)

/* Chip Select macro definition */
#define ACCELERO_CS_LOW()       HAL_GPIO_WritePin(ACCELERO_CS_GPIO_PORT, ACCELERO_CS_PIN, GPIO_PIN_RESET)
#define ACCELERO_CS_HIGH()      HAL_GPIO_WritePin(ACCELERO_CS_GPIO_PORT, ACCELERO_CS_PIN, GPIO_PIN_SET)

/**
  * @brief  ACCELEROMETER Interface pins
  */
#define ACCELERO_CS_PIN                    GPIO_PIN_3                 /* PE.03 */
#define ACCELERO_CS_GPIO_PORT              GPIOE                      /* GPIOE */
#define ACCELERO_CS_GPIO_CLK_ENABLE()      __GPIOE_CLK_ENABLE()
#define ACCELERO_CS_GPIO_CLK_DISABLE()     __GPIOE_CLK_DISABLE()
#define ACCELERO_INT_GPIO_PORT                 GPIOE                      /* GPIOE */
#define ACCELERO_INT_GPIO_CLK_ENABLE()         __GPIOE_CLK_ENABLE()
#define ACCELERO_INT_GPIO_CLK_DISABLE()        __GPIOE_CLK_DISABLE()
#define ACCELERO_INT1_PIN                      GPIO_PIN_0                 /* PE.00 */
#define ACCELERO_INT1_EXTI_IRQn                EXTI0_IRQn 
#define ACCELERO_INT2_PIN                      GPIO_PIN_1                 /* PE.01 */
#define ACCELERO_INT2_EXTI_IRQn                EXTI1_IRQn 
/**
  * @}
  */ 


/*##################### AUDIO ##########################*/
/**
  * @brief  AUDIO I2C Interface pins
  */
#define AUDIO_I2C_ADDRESS                     0x94
  
  /* Audio Reset Pin definition */
#define AUDIO_RESET_GPIO_CLK_ENABLE()         __GPIOD_CLK_ENABLE()
#define AUDIO_RESET_PIN                       GPIO_PIN_4
#define AUDIO_RESET_GPIO                      GPIOD
/**
  * @}
  */ 

#ifdef __cplusplus
}
#endif

#endif /* __STM32F4_DISCOVERY_H */
/**
  * @}
  */ 
 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

